Coupling Faults Detection In Memories Using With Finite State Machine And Microcode Based And Microcode Based Memory Built In Self Test(Mbist)

1P Anitha, CH Moses, R Purshotham Naik, P John Paul

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Abstract:

Built-in Self-Test, or BIST, is the technique of designing additional hardware and software features into integrated circuits to allow them to perform self-testing, testing of their own operation using their own circuits, thereby reducing dependence on external automated test equipment (ATE). BIST is also the solution to the testing of critical circuits that have no direct connections to external pins, such as embedded memories used internally by the devices. In the near future, even the most advanced tester may no longer be adequate for the fastest chip, a situation wherein self-testing may be the best solution. Microcode-based and FSM-based controllers are two widely known architectures used for programmable memory built-in self-test. These techniques are popular because of their flexibility of programming new test algorithms. In this paper, the architectures for both controllers are designed to implement a new test algorithm MARCH SAM that gives a better fault coverage in detecting single-cell fault and all intra-word coupling fault (CF).The components of each controllers are studied and designed. The both of the controller are written using Verilog HDL and implemented FPGA. The simulation and synthesis results of both architectures are presented.

Keywords:

Built in self test, FSM, Coupling faults, march Sam, fault, FPGA

Paper Details
Month5
Year2020
Volume24
IssueIssue 10
Pages1358-1369