Designing a Supply Voltage Sensor of HighResolution for FPGA
1Asit Subudhi, Saumendra Mohanty
the integration densities are higher in integrated circuits (ICs). The synchronization of switching activities is done by using a single global clock as one of the main causes that results in the voltage drop across integrated circuit’s power distribution network (PDN). Since a circuit’s delay is increased by drop, timing failures may occur because of such drops that causes the malfunctioning of IC. Thus, it is essential to use a tool for supporting failure debugging. A supply voltage sensor having high resolution is presented in this paper which has real time failures of debugging and timing margins are determined for critical designs of timing. This voltage sensor is made up of standard “Look-Up Table (LUT) cells” and has dedicated carry cells having propagation delays of high speed. The supply voltage sensor has a voltage resolution of about “3.3 mV on a Xilinx FPGA Spartan-6 (XC6SLX9)”.
- look-up table, power distribution network, ring oscillator, voltage sensor.